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2 Megabit CMOS Flash Memory second source
CAT28F020
Licensed Intel
FEATURES
s Commercial, industrial and automotive
s Fast read access time: 90/120 ns
s Low power CMOS dissipation:
– Active: 30 mA max (CMOS/TTL levels)
– Standby: 1 mA max (TTL levels)
– Standby: 100 μ A max (CMOS levels)
s High speed programming:
– 10 μ s per byte
– 4 seconds typical chip program
s 0.5 seconds typical chip-erase
temperature ranges
s Stop timer for program/erase
s On-chip address and data latches
s JEDEC standard pinouts:
– 32-pin DIP
– 32-pin PLCC
– 32-pin TSOP (8 x 20)
s 100,000 program/erase cycles
s 12.0V
± 5% programming and erase voltage
s 10 year data retention
s Electronic signature
DESCRIPTION
The CAT28F020 is a high speed 256K x 8-bit electrically
erasable and reprogrammable Flash memory ideally
suited for applications requiring in-system or after-sale
code updates. Electrical erasure of the full memory
contents is achieved typically within 0.5 second.
It is pin and Read timing compatible with standard
EPROM and E 2 PROM devices. Programming and
Erase are performed through an operation and verify
algorithm. The instructions are input via the I/O bus,
BLOCK DIAGRAM
using a two write cycle scheme. Address and Data are
latched to free the I/O bus and address bus during the
write operation.
The CAT28F020 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 10 years. The device is available in JEDEC
approved 32-pin plastic DIP, 32-pin PLCC or 32-pin
TSOP packages.
I/O0–I/O7
I/O BUFFERS
ERASE VOLTAGE
SWITCH
WE
COMMAND
REGISTER
PROGRAM VOLTAGE
SWITCH
CE, OE LOGIC
DATA
LATCH
SENSE
AMP
CE
OE
Y-GATING
Y-DECODER
A0–A17
VOLTAGE VERIFY
SWITCH
X-DECODER
2,097,152 BIT
MEMORY
ARRAY
5115 FHD F02
? 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice
1
Doc. No. MD-1029, Rev. F
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